Varanasi-221 05
DESIGN AND DEVELOPMENT OF
A SMART ENERGY GRID ARCHITECTURE WITH ENERGY STORAGE
DST- SERI SPONSORED PROJECT (No. GP/LT/EE/2015-16/03)
Department of Electrical Engineering.
Senior Research Fellow (2Nos.) for the Project of DSTSERI
titled “Design and Development of a Smart Energy Grid Architecture with Energy
Storage”, Ministry of Science & Technology, Department of Science & Technology,
Government of India for the period of 3 years.
Qualification Essential : (1) The candidates must have first class B. Tech. in Electrical Engineering /
M. Tech. in Power Systems with institute of repute.
(2) The candidate must be conversant with advance technology of Smart Grid
& Intelligent Control preferably with 2 years of relevant experience.
(3) GATE qualified, Upper Age Limit 32 years
Desirable: The candidate having broad base of power systems and advance control
with software applications and algorithmic development shall be
preferred.
Application on plain paper with full academic/experience details along with necessary
supporting documents and address for communication & email must reach to Prof. R. K.
Pandey, Principal Investigator of DST-SERI Project, Department of Electrical
Engineering, Power Systems Complex, Indian Institute of Technology (BHU), Varanasi-
221 005 by June 15, 2015 positively.
Application Form
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